pic12c508a/509a ? 2000 microchip technology inc. ds80024b-page 1 the pic12c5xx-parts conform functionally to the pic12c5xx data sheet (ds40139e), except for the anomalies described below: none clarifications/corrections to the data sheet: in the device data sheet (ds40139e), the following clar- ifications and corrections should be noted. section 13: corrections for the dc characteristics, sec- tion 13.2, section 13.3 and section 13.4 are shown. corrections for the gpio pull-up resistor ranges are shown in table 13-1. for the section titled ?reset?, additional information is provided on osc1/clkin and osc2/clkout pin states during a mclr . errata sheet for pic12c508a/509a (rev. a silicon)
pic12c508a/509a ds80024b-page 2 ? 2000 microchip technology inc. 13.2 dc characteristics: pic12lc508a/509a (commercial, industrial) pic12lce518/519 (commercial, industrial) pic12lcr509a (commercial, industrial) dc characteristics power supply pins standard operating conditions (unless otherwise specified) operating temperature 0 c t a +70 c (commercial) ? 40 c t a +85 c (industrial) parm no. characteristic sym min typ (1) max units conditions ? i wdt ? 2.0 2.0 4 5 a a v dd = 2.5v, commercial v dd = 2.5v, industrial * these parameters are characterized but not tested. note 1: data in the typical ( ? typ ? ) column is based on characterization results at 25 c. this data is for design guidance only and is not tested. 2: this is the limit to which v dd can be lowered in sleep mode without losing ram data. 3: the supply current is mainly a function of the operating voltage and frequency. other factors such as bus loading, oscillator type, bus rate, internal code execution pattern, and temperature also have an impact on the current consumption. a) the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tristated, pulled to vss, t0cki = v dd , mclr = v dd ; wdt enabled/disabled as specified. b) for standby current measurements, the conditions are the same, except that the device is in sleep mode. 4: does not include current through rext. the current through the resistor can be estimated by the formula: i r = v dd /2rext (ma) with rext in kohm. 5: the power down current in sleep mode does not depend on the oscillator type. power down current is measured with the part in sleep mode, with all i/o pins in hi-impedance state and tied to v dd or v ss .
? 2000 microchip technology inc. ds80024b-page 3 pic12c508a/509a 13.3 dc characteristics: pic12c508a/509a (commercial, industrial, extended) pic12ce518/519 (commercial, industrial, extended) pic12cr509a (commercial, industrial, extended) dc characteristics standard operating conditions (unless otherwise specified) operating temperature 0 c t a +70 c (commercial) ? 40 c t a +85 c (industrial) ? 40 c t a +125 c (extended) operating voltage v dd range as described in dc spec section 13.1 and section 13.2. param no. characteristic sym min typ? max units conditions input high voltage i/o ports v ih - d040 with ttl buffer 2.0v - v dd v4.5v v dd 5.5v d040a 0.25v dd + 0.8v -v dd votherwise d070 gpio weak pull-up current (note 4) i pur 30 250 400 av dd = 5v, v pin = v ss input leakage current (notes 2, 3) i il d061 gp3/mclr (note 5) 8 130 250 avss v pin v dd d061a gp3/mclr (note 6) - - + 5 avss v pin v dd ? data in ? typ ? column is at 5v, 25 c unless otherwise stated. these parameters are for design guidance only and are not tested. note 1: in extrc oscillator configuration, the osc1/clkin pin is a schmitt trigger input. it is not recommended that the pic12c5xx be driven with external clock in rc mode. 2: the leakage current on the mclr pin is strongly dependent on the applied voltage level. the specified levels represent nor- mal operating conditions. higher leakage current may be measured at different input voltages. 3: negative current is defined as coming out of the pin. 4: does not include gp3. for gp3 see parameters d0061 and d0061a. 5: this spec. applies to gp3/mclr configured as external mclr and gp3/mclr configured as input with internal pull-up enabled. 6: this spec. applies when gp3/mclr is configured as an input with pull-up disabled. the leakage current of the mclr circuit is higher than the standard i/o logic.
pic12c508a/509a ds80024b-page 4 ? 2000 microchip technology inc. 13.4 dc characteristics: pic12lc508a/509a (commercial, industrial) pic12lce518/519 (commercial, industrial) pic12lcr509a (commercial, industrial) dc characteristics standard operating conditions (unless otherwise specified) operating temperature 0 c t a +70 c (commercial) ? 40 c t a +85 c (industrial) operating voltage v dd range as described in dc spec section 13.1 and section 13.2. param no. characteristic sym min typ ? max units conditions input high voltage i/o ports v ih - d040 with ttl buffer 2.0v - v dd v4.5v v dd 5.5v d040a 0.25v dd + 0.8v -v dd v otherwise d070 gpio weak pull-up current (note 4) i pur 30 250 400 av dd = 5v, v pin = v ss input leakage current (notes 2, 3) i il d061 gp3/mclr (note 5) 8 130 250 a vss v pin v dd d061a gp3/mclr (note 6) - - + 5 a vss v pin v dd ? data in ? typ ? column is at 5v, 25 c unless otherwise stated. these parameters are for design guidance only and are not tested. note 1: in extrc oscillator configuration, the osc1/clkin pin is a schmitt trigger input. it is not recommended that the pic12c5xx be driven with external clock in rc mode. 2: the leakage current on the mclr pin is strongly dependent on the applied voltage level. the specified levels represent nor- mal operating conditions. higher leakage current may be measured at different input voltages. 3: negative current is defined as coming out of the pin. 4: does not include gp3. for gp3 see parameters d0061 and d0061a. 5: this spec. applies to gp3/mclr configured as external mclr and gp3/mclr configured as input with internal pull-up enabled. 6: this spec. applies when gp3/mclr is configured as an input with pull-up disabled. the leakage current of the mclr circuit is higher than the standard i/o logic.
? 2000 microchip technology inc. ds80024b-page 5 pic12c508a/509a table 13-1: pull-up resistor ranges* - pic12c508a, pic12c509a, pic12cr509a, pic12ce518, pic12ce519, pic12lc508a, pic12lc509a, pic12lcr509a, pic12lce518 and pic12lce519 reset when mclr is asserted, the state of the osc1/clkin and clkout/osc2 pins are as follows: v dd (volts) temperature ( c) min typ max units gp0/gp1 2.5 ? 40 38k 42k 63k ? 25 42k 48k 63k ? 85 42k 49k 63k ? 125 50k 55k 63k ? 5.5 ? 40 15k 17k 20k ? 25 18k 20k 23k ? 85 19k 22k 25k ? 125 22k 24k 28k ? gp3 (1) 2.5 ? 40 65k 80k 850k ? 25 80k 100k 1150k ? 85 85k 110k 1300k ? 125 100k 120k 1500k ? 5.5 ? 40 50k 60k 600k ? 25 60k 65k 750k ? 85 65k 80k 900k ? 125 75k 90k 990k ? * these parameters are characterized but not tested. note 1: the weak pull-up resistor and associated current for the gp3/mclr pin is non-linear when the respective pin voltage is less than v dd - 1.0v. see parameter d061 for gp3/mclr pin current specifications. clkin/clkout pin states when mclr asserted oscillator mode osc1/clkin pin osc2/clkout pin extrc, clkout on osc2 osc1 pin is tristated and driven by external circuit osc2 pin is driven low extrc, osc2 is i/o osc1 pin is tristated and driven by external circuit osc2 pin is tristate input intrc, clkout on osc2 osc1 pin is tristate input osc2 pin is driven low intrc, osc2 is i/o osc1 pin is tristate input osc2 pin is tristate input
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